Verisity Launches eAnalyzer; eAnalyzer Eases Development by Supporting Proven Reuse Methodology, Coverage-Driven Verification, and the IEEE p1647 Standard

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Sept. 15, 2003--Verisity Ltd. (Nasdaq:VRST), the leading supplier of verification process automation solutions, today announced a new product to increase engineers' productivity by making it easier to develop high-quality, consistent verification environments. eAnalyzer(TM) is an intuitive static analysis and verification methodology compliance system that simplifies verification environment development. eAnalyzer allows engineers to easily adopt best practices at the module and system level by supporting Verisity's eReuse methodology (eRM(TM)) which is the foundation of the recently announced System Verification Methodology (sVM(TM)) (see related release "Verisity Simplifies the Adoption of Proven 10x SoC Verification Processes," dated September 15, 2003.). eAnalyzer facilitates verification component reuse, enabling easy creation of highly automated, high-quality, consistent chip-level verification environments using best-known guidelines. eAnalyzer will also support the emerging IEEE e standard verification language. Today's announcements support a series of enhancements that Verisity calls Verification Process Automation (VPA) solutions, defined as a pre-packaged, readily adoptable best practices for the broader SoC community.

eAnalyzer provides a complete suite of static analysis and verification methodology checks that automatically ensure that engineers are developing their verification environments or components using eRM defined guidelines based on a coverage-based approach. Including these methodology checks, eAnalyzer includes a total of eight classes of rule checks, four of which are industry standard syntax, semantics, lint and style analyses. The remaining rule checks include verification-specific analyses such as generation and performance profiling.

eAnalyzer also supports the IEEE approved version of the e verification language--P1647. Earlier this year, Verisity announced that the IEEE Design Automation Standards Committee (DASC) approved a project authorization request to use the e language as a basis for standardization. eAnalyzer will ensure that code development follows the IEEE standard, enabling easy reuse for future projects.

"eAnalyzer is a key addition to an engineers' verification tool suite as it enables engineers to develop verification environments effortlessly by ensuring that they are following proven guidelines," said Joseph Hupcey III, product marketing manager for Verisity. "eAnalyzer is completely unique as it is the only tool that enforces a proven verification reuse methodology with IEEE P1647 compliance. With eAnalyzer, engineers develop their module or system-level verification environments easily, with the added assurance of easy re-use on subsequent projects."

eAnalyzer Features

eAnalyzer includes the following analysis categories, comprising specific sub-categories of checking and reporting:

1.) Software: includes syntax & semantic, lint, and style

checks in the spirit of software static analysis tools.

This allows users to find questionable code and coding

styles, identify reuse and porting issues, and generally

accelerate the setup, debug, and integration of their

verification environment.

2.) Verification: The checks in the generation and performance

sub-categories allow users to review and tune their code

for maximum performance.

3.) Methodology: Checks specific to coverage-driven

verification and eRM are provided to guide users in

successfully implementing these two time-tested

methodologies. For eRM in particular, eAnalyzer can

automatically generate an eRM compliance report that

enumerates the code's conformance to each element of the

eRM checklist.

Additionally, eAnalyzer's intuitive GUI-based operation supports cross-window probing between messages and code, point & click locator bars for quick code navigation, and layerable message filters. These features all combine to simplify important operations for novice and expert users alike.

Pricing and Availability

eAnalyzer is available now on the Linux Operating System, Solaris and HP workstations running HP-UX. The price is $22,000 U.S. for an annual license and maintenance.

About Verisity

Verisity, Ltd. (Nasdaq:VRST), is the leading supplier of process automation solutions for the functional verification market. The company addresses customers' critical business issues with its market-leading software and intellectual property (IP) that effectively and efficiently verify the design of electronic systems and complex integrated circuits for the communications, computing, and consumer electronics global markets. Verisity's Specman Elite(R) verification process automation solution automates manual processes and detects critical flaws in hardware designs enabling delivery of the highest quality products and accelerating time to market. The company's strong market presence is driven by its proven technology, methodology, and solid strategic partnerships and programs. Verisity's customer list includes leading companies in all strategic technology sectors. Verisity is a global organization with offices throughout Asia, Europe, and North America. Verisity's principal executive offices are located in Mountain View, California, with its principal research and development offices located in Rosh Ha'ain, Israel. For more information, visit www.verisity.com.

Verisity, the Verisity logo, eAnalyzer and eRM are either registered trademarks or trademarks of Verisity Design, Inc. in the United States and/or other jurisdictions. All other trademarks are the property of their respective holders.

CONTACT: Verisity Design, Inc.
             Jennifer Bilsey, 650-934-6823
             jen@verisity.com